Proving the power

Abstract

The number of components used in system-on-chips (SoCs) is increasing dramatically as designs move into 90/65nm technologies and ensuring proper delivery of power to all the components is becoming much more difficult. There is a new technology that designers can use to sign-off the structural Integrity of the power grid early in the process, before proceeding with any power consumption, voltage drop or electromigration simulations. The technique is similar to formal verification, where assertions can be proven independent of vector stimulus.