Modeling multi-valued circuits in SystemC*

Abstract

The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area is SystemC which is a C++-library. To take advantage of SystemC in the multi-valued domain, the concept of multi-valued logic has to be embedded in SystemC In this paper such a concept is introduced and details of the implementation are given. This creates a powerful development environment to model and efficiently simulate complex multi-valued circuits and systems. Due to C++-concepts, like operator overloading and templates, the task of modeling circuits becomes very convenient and handling of multi-valued signals is elegant. This gives the opportunity to design large circuits that can be mapped onto physically multi-valued gates. A scalable arithmetic logic unit is studied and experimental results are given.