A performance driven generator for efficient testable conditional-sum-adders

B. Becker, P. Molitor
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引用次数: 5

Abstract

The authors present a performance driven generator for integer adders which is parameterized in n, the operands' bit length, t/sub n/, the delay of the addition, and FM, the (cell based static) fault model. FM may in particular be chosen as the classical stuck-at fault model or the cellular fault model. The output of the generator is an area-minimal n-bit adder of the conditional-sum type with delay >
高效可测试条件加法器的性能驱动生成器
本文提出了一种性能驱动的整数加法器生成器,参数化为n、操作数位长、t/sub n/、加法延迟和FM(基于单元的静态)故障模型。特别是调频,可以选择经典的卡滞故障模型或元胞故障模型。生成器的输出是延时>的条件和类型的最小面积n位加法器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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