ARM and FPGA Heterogeneous Accelerated Processing System Based on HLS and PCIe

Zhonghao Zhang, Zhengxiang Li
{"title":"ARM and FPGA Heterogeneous Accelerated Processing System Based on HLS and PCIe","authors":"Zhonghao Zhang, Zhengxiang Li","doi":"10.1109/ICICT52872.2021.00055","DOIUrl":null,"url":null,"abstract":"Nowadays, with the development of highperformance computing, heterogeneous computing system has become a trend. This paper designs an CPU+FPGA heterogeneous accelerated processing system that uses embedded ARM and FPGA to communicate via PCIe bus. The system mainly uses the Jetson TX2 ARM development board, the development board and FPGA board are connected via PCIe, and High-Level Synthesis (HLS) method is used to transplant the implemented algorithms needed in the project to the FPGA. The focus of this article is: how to use XDMA IP core to connect FPGA and ARM processor through PCIe bus, and how to use HLS to generate IP core. The article completed the architecture design, analyzed the working mechanism of the XDMA kernel module in the Linux system, and analyzed the system bandwidth and delay.","PeriodicalId":359456,"journal":{"name":"2021 4th International Conference on Information and Computer Technologies (ICICT)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 4th International Conference on Information and Computer Technologies (ICICT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICT52872.2021.00055","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Nowadays, with the development of highperformance computing, heterogeneous computing system has become a trend. This paper designs an CPU+FPGA heterogeneous accelerated processing system that uses embedded ARM and FPGA to communicate via PCIe bus. The system mainly uses the Jetson TX2 ARM development board, the development board and FPGA board are connected via PCIe, and High-Level Synthesis (HLS) method is used to transplant the implemented algorithms needed in the project to the FPGA. The focus of this article is: how to use XDMA IP core to connect FPGA and ARM processor through PCIe bus, and how to use HLS to generate IP core. The article completed the architecture design, analyzed the working mechanism of the XDMA kernel module in the Linux system, and analyzed the system bandwidth and delay.
基于HLS和PCIe的ARM和FPGA异构加速处理系统
如今,随着高性能计算的发展,异构计算系统已成为一种趋势。本文设计了一种CPU+FPGA异构加速处理系统,该系统采用嵌入式ARM和FPGA通过PCIe总线通信。系统主要采用Jetson TX2 ARM开发板,开发板与FPGA板通过PCIe连接,采用HLS (High-Level Synthesis)方法将项目中需要实现的算法移植到FPGA上。本文的重点是:如何使用XDMA IP核通过PCIe总线连接FPGA和ARM处理器,以及如何使用HLS生成IP核。本文完成了体系结构设计,分析了XDMA内核模块在Linux系统中的工作机制,分析了系统带宽和时延。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信