Fabrication and characterization of vertical silicon nanopillar Schottky diodes

N. Chandra, A. Overvig, C. Tracy, S. Goodnick
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Abstract

The authors report fabrication of vertical Schottky diodes using sub-100nm diameter n-type doped Silicon nanopillars. The nanopillars were fabricated using a top-down approach employing the Bosch process. Square-shaped islands of Silicon dioxide patterned using electron beam lithography and deposited by thermal evaporation acted as hard masks for vertical inductively coupled plasma (ICP) etching. Once formed, the nanopillars were conformally covered in a blanket layer of SiO2 and their tips were exposed using Chemical-Mechanical Polishing. Nickel contacts were patterned and deposited on them using DC magnetron sputtering and were annealed to form Nickel silicide forming Schottky diodes with barrier heights between 0.6 and 0.7 eV. We have thus established a low temperature process (no thermal oxide required) for constructing vertical Silicon Schottky diodes with approximately circular cross-sections of diameters from 40nm to 100nm. The ION to IOFF ratio was at least 104. We also observed non-ideal current-voltage characteristics that differentiate these nanoscale diodes from planar Schottky diodes.
垂直硅纳米柱肖特基二极管的制备与表征
作者报道了利用直径小于100nm的n型掺杂硅纳米柱制备垂直肖特基二极管。纳米柱是用自上而下的方法制造的,采用博世工艺。利用电子束光刻和热蒸发沉积的方形二氧化硅岛作为垂直电感耦合等离子体(ICP)蚀刻的硬掩膜。纳米柱一旦形成,就会在表面覆盖一层SiO2,并通过化学机械抛光将其尖端暴露出来。利用直流磁控溅射技术对镍触点进行了图案化和沉积,并对其进行了退火,得到了势垒高度在0.6 ~ 0.7 eV之间的硅化镍肖特基二极管。因此,我们已经建立了一种低温工艺(不需要热氧化物),用于构建直径从40纳米到100纳米的近似圆形截面的垂直硅肖特基二极管。离子与离合比至少为104。我们还观察到将这些纳米级二极管与平面肖特基二极管区分开来的非理想电流电压特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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