A study on the implementation of the DSSS modem for a flight termination system

Keumsang Lim, HyangDuck Cho, Jaehwan Kim, Wooshik Kim
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引用次数: 2

Abstract

This paper describes the design of a direct sequence spread spectrum (DSSS) modem for a flight termination system using VHDL [R.K. Ducek, 2001] and FPGAs. The advantages of DSSS FTS includes the immunity from interference signals and anti-jamming effect. The error correcting scheme of a FTS uses (15,11) Reed-Solomon code. The spread codes of the inphase (I) and quadrature (Q) channel sequence can be generated using a gold sequence generator. The main algorithm is implemented in Altera APEX20K100E FPGAs
某飞行终端系统DSSS调制解调器的实现研究
介绍了一种基于VHDL [R.K.]的直接序列扩频调制解调器的设计Ducek, 2001]和fpga。DSSS FTS的优点包括对干扰信号的抗扰性和抗干扰效果。FTS的纠错方案采用(15,11)Reed-Solomon码。相位(I)和正交(Q)信道序列的扩频码可以使用金序列发生器生成。主要算法在Altera APEX20K100E fpga上实现
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