Pulse width controlled PLL/DLL using soft thermometer code

T. Nakura, K. Asada
{"title":"Pulse width controlled PLL/DLL using soft thermometer code","authors":"T. Nakura, K. Asada","doi":"10.1109/ASSCC.2013.6691053","DOIUrl":null,"url":null,"abstract":"This paper demonstrates pulse width controlled PLL and DLL using a soft thermometer code. The oscillation frequency control in the PLL and the delay control in the DLL are conducted by a mostly digital with one bit analog code. Both of our PLL/DLL do not use an area-consuming capacitor, resulting in small silicon area implementation. A 65nm CMOS process uses only 120μm×30μm area for the PLL+DLL. They realized 2.80GHz operation consuming 1.35mW/4.65mW with 1.60ps/1.78ps rms jitter from the PLL/DLL output signals.","PeriodicalId":296544,"journal":{"name":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2013.6691053","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

This paper demonstrates pulse width controlled PLL and DLL using a soft thermometer code. The oscillation frequency control in the PLL and the delay control in the DLL are conducted by a mostly digital with one bit analog code. Both of our PLL/DLL do not use an area-consuming capacitor, resulting in small silicon area implementation. A 65nm CMOS process uses only 120μm×30μm area for the PLL+DLL. They realized 2.80GHz operation consuming 1.35mW/4.65mW with 1.60ps/1.78ps rms jitter from the PLL/DLL output signals.
脉冲宽度控制PLL/DLL使用软温度计代码
本文演示了脉冲宽度控制锁相环和DLL使用软温度计代码。锁相环的振荡频率控制和动态锁相环的延迟控制都是由一个1位模拟码进行的。我们的PLL/DLL都不使用面积消耗电容器,导致小硅面积实现。65nm CMOS工艺仅使用120μm×30μm面积用于PLL+DLL。他们实现了2.80GHz的工作,消耗1.35mW/4.65mW, PLL/DLL输出信号的有效值抖动为1.60ps/1.78ps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信