Hardware/software codesign for signal processing systems. A survey and new results

Abstract

At least six different hardware/software codesign methodologies have been proposed for rapid prototyping in the past few years. Some of these describe the various process steps without providing specifics for implementation. Others focus more on implementation issues without explicitly considering methodology and process flow. We propose a new industry-driven rapid prototyping codesign methodology for signal processing applications which uses parametric cost estimation tools to minimize development cost, while maximizing product profits. Mixed integer programming formulations are used to model the architecture selection and partitioning process steps. Our approach, as part of ARPA's RASSP program, utilizes a hardware-less VHDL cosimulation and co-verification methodology for rapid prototyping which supports solutions for high performance signal processing applications.