Jungah Kim, Shinil Chang, Seungsoo Kim, Hyunchol Shin
{"title":"A 1.2 GHz Bandwidth Baseband Analog Circuit in 65nm CMOS for Millimeter-Wave Radio","authors":"Jungah Kim, Shinil Chang, Seungsoo Kim, Hyunchol Shin","doi":"10.1109/ISOCC47750.2019.9027652","DOIUrl":null,"url":null,"abstract":"This paper presents a wide-bandwidth baseband analog (BBA) amplifier circuit in 65 nm CMOS for 5G mm-wave radio applications. The BBA is composed of an input buffer with dc offset cancellation (DCOC), four-stage variable gain amplifiers (VGAs), and 50-ohm driving output buffers. All blocks are designed in differential to enhance the common mode rejection. The DCOC is based on a body-bias control method for mitigating conflict with the gain control part. Designed in 65nm CMOS, the performances are assessed through post-layout simulations. The BBA consumes 30.2 mW from a 1.2 V supply. The total gain range is 6.2 - 34.5 dB. The bandwidth varies from 1.2 to 2.2 GHz across the total gain tuning range. The entire layout size is 0.053 mm2,","PeriodicalId":113802,"journal":{"name":"2019 International SoC Design Conference (ISOCC)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC47750.2019.9027652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a wide-bandwidth baseband analog (BBA) amplifier circuit in 65 nm CMOS for 5G mm-wave radio applications. The BBA is composed of an input buffer with dc offset cancellation (DCOC), four-stage variable gain amplifiers (VGAs), and 50-ohm driving output buffers. All blocks are designed in differential to enhance the common mode rejection. The DCOC is based on a body-bias control method for mitigating conflict with the gain control part. Designed in 65nm CMOS, the performances are assessed through post-layout simulations. The BBA consumes 30.2 mW from a 1.2 V supply. The total gain range is 6.2 - 34.5 dB. The bandwidth varies from 1.2 to 2.2 GHz across the total gain tuning range. The entire layout size is 0.053 mm2,