A proposal for clock reference correction in MPEG-2 transport stream processors

Abstract

The transport stream is a standard format commonly used in digital TV systems for conveying audio, video and program-related information. Among other data, transport streams also encapsulate a timing reference, known as program clock reference, which is a snapshot of the 27 MHz system clock. This information allows clock recovery in receivers, which provides correct content presentation and even drives output interfaces. However, if arrival times of transport packets change during transmission or processing, such a scenario may lead to system clock errors, which is known as jitter. Traditional methods for correcting the program clock reference information are normally based on 27 MHz counters/floating-point accumulators and do not completely mitigate jitter. More recent methods use a semaphore-controlled counter/accumulator and even propose a joint adaptation and clock reference correction, which result in a reduced number of operations and low jitter levels at the output, respectively. Nevertheless, there is no study concerning the implementation of semaphore-controlled methods in transport stream processors. Given that, the present work proposes an implementation methodology for field-programmable gate arrays, using hardware description language. The related results validate the use of semaphore-controlled methods and show that the proposed methodology is effective, with the benefit of avoiding metastability effects.