Communication Considerations for Silicon Interconnect Fabric

Boris Vaisband, S. Iyer
{"title":"Communication Considerations for Silicon Interconnect Fabric","authors":"Boris Vaisband, S. Iyer","doi":"10.1109/SLIP.2019.8771326","DOIUrl":null,"url":null,"abstract":"Silicon interconnect fabric (Si-IF) is a heterogeneous integration platform for ultra-large systems. Unpackaged dies are attached directly to a Si wafer at fine vertical interconnect pitch (2 to 10 μm) and small inter-die spacing (≤ 100 μm). The Si-IF replaces conventional interposers, packages, and printed circuit boards, and provides a single-hierarchy integration construct. Communication on the Si-IF platform is a key system-level challenge. Various approaches for local, semi-global (regional), and global communication are discussed in this paper. A network on interconnect fabric, based on intelligent utility dies, to support various system-level services, including communication, is introduced. Binning of communication schemes based on simulations of latency and energy is performed. A related design space, evaluated in terms of energy-latency product, with respect to distance is offered. Finally, external communication aspects are also discussed.","PeriodicalId":340036,"journal":{"name":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SLIP.2019.8771326","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Silicon interconnect fabric (Si-IF) is a heterogeneous integration platform for ultra-large systems. Unpackaged dies are attached directly to a Si wafer at fine vertical interconnect pitch (2 to 10 μm) and small inter-die spacing (≤ 100 μm). The Si-IF replaces conventional interposers, packages, and printed circuit boards, and provides a single-hierarchy integration construct. Communication on the Si-IF platform is a key system-level challenge. Various approaches for local, semi-global (regional), and global communication are discussed in this paper. A network on interconnect fabric, based on intelligent utility dies, to support various system-level services, including communication, is introduced. Binning of communication schemes based on simulations of latency and energy is performed. A related design space, evaluated in terms of energy-latency product, with respect to distance is offered. Finally, external communication aspects are also discussed.
硅互连结构的通信考虑
硅互连结构(Si-IF)是一种面向超大规模系统的异构集成平台。未封装的晶片直接附着在硅晶片上,垂直互连间距小(2 ~ 10 μm),晶片间距小(≤100 μm)。Si-IF取代了传统的中间层、封装和印刷电路板,并提供了单一层次的集成结构。Si-IF平台上的通信是一个关键的系统级挑战。本文讨论了本地、半全球(区域)和全球通信的各种方法。介绍了一种基于智能实用模块的互连结构网络,以支持包括通信在内的各种系统级服务。基于时延和能量的仿真,对通信方案进行了分组。提供了一个相关的设计空间,根据能量延迟产品评估,相对于距离。最后,对外沟通方面也进行了讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信