{"title":"Communication Considerations for Silicon Interconnect Fabric","authors":"Boris Vaisband, S. Iyer","doi":"10.1109/SLIP.2019.8771326","DOIUrl":null,"url":null,"abstract":"Silicon interconnect fabric (Si-IF) is a heterogeneous integration platform for ultra-large systems. Unpackaged dies are attached directly to a Si wafer at fine vertical interconnect pitch (2 to 10 μm) and small inter-die spacing (≤ 100 μm). The Si-IF replaces conventional interposers, packages, and printed circuit boards, and provides a single-hierarchy integration construct. Communication on the Si-IF platform is a key system-level challenge. Various approaches for local, semi-global (regional), and global communication are discussed in this paper. A network on interconnect fabric, based on intelligent utility dies, to support various system-level services, including communication, is introduced. Binning of communication schemes based on simulations of latency and energy is performed. A related design space, evaluated in terms of energy-latency product, with respect to distance is offered. Finally, external communication aspects are also discussed.","PeriodicalId":340036,"journal":{"name":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SLIP.2019.8771326","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Silicon interconnect fabric (Si-IF) is a heterogeneous integration platform for ultra-large systems. Unpackaged dies are attached directly to a Si wafer at fine vertical interconnect pitch (2 to 10 μm) and small inter-die spacing (≤ 100 μm). The Si-IF replaces conventional interposers, packages, and printed circuit boards, and provides a single-hierarchy integration construct. Communication on the Si-IF platform is a key system-level challenge. Various approaches for local, semi-global (regional), and global communication are discussed in this paper. A network on interconnect fabric, based on intelligent utility dies, to support various system-level services, including communication, is introduced. Binning of communication schemes based on simulations of latency and energy is performed. A related design space, evaluated in terms of energy-latency product, with respect to distance is offered. Finally, external communication aspects are also discussed.