LC Tank Differential Inductor-Coupled Dual-Core 60 GHz Push-Push VCO in 45 nm RF-SOI CMOS Technology

J. Rimmelspacher, R. Weigel, A. Hagelauer, V. Issakov
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引用次数: 3

Abstract

This paper presents a 60 GHz dual-core push-push VCO in a 45 nm partially depleted (PD) RF Silicon-on-Insulator (SOI) CMOS technology. The cores are coupled inductively via differential inductors. The best measured phase noise at 1 MHz offset from a 63 GHz carrier is -$94.4 dBc/Hz. The wideband continuous frequency-tuning-range (FTR) is 16 %. The DC power dissipation is 76 mW including fundamental 30 GHz and second harmonic (H2) 60 GHz output buffers at 1 V power supply voltage. The measurement results of a reference single-core VCO design proves the relative phase noise improvement of the implemented core-coupling technique. The chip area excluding pads is 0.09 mm2.
45纳米RF-SOI CMOS技术的LC槽差分电感耦合双核60 GHz推推式压控振荡器
本文提出了一种采用45纳米部分耗尽(PD)射频绝缘体上硅(SOI) CMOS技术的60 GHz双核推推式压控振荡器。磁芯通过差动电感电感耦合。在63 GHz载波的1 MHz偏移时,测量到的最佳相位噪声为-$94.4 dBc/Hz。宽带连续调频范围(FTR)为16%。直流功耗为76 mW,其中基频30ghz和次谐波(H2) 60ghz输出缓冲器在1v电源电压下。参考单芯压控振荡器设计的测量结果证明了所实现的芯耦合技术对相对相位噪声的改善。不包括焊盘的芯片面积为0.09 mm2。
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