A new DVFS algorithm to minimize energy consumption on system-on-chip architecture and electrical characteristics

Abstract

Over the decades, lots of power management methods have been devised to increase battery life time in mobile devices. Among them, DVFS (Dynamic Voltage and Frequency Scaling) algorithms have been introduced to minimize energy consumption while meeting the required performance at the same time. Generally, most DVFS algorithms aim to minimize energy consumption without hurting QoS (Quality of Service) by selecting the lowest frequency which satisfies the performance required by workloads. However, it becomes more difficult to achieve energy efficiency with the existing DVFS algorithms on highly complex systems, such as de-coupling between operating frequency and voltage, and increasing static power due to the fine process trend. Therefore, the need for an entirely new DVFS algorithm has come to the fore. The new algorithm is designed to be well-deployed onto such complex systems, and follow the fundamental goal - minimizing energy, not simply reducing the power. In this paper, we are going to introduce an algorithm to satisfy the requirements.