High-Precision Precharge Control Circuit for SRAM in Convolutional Neural Network Processor

Abstract

This paper proposals a high precision pre-charge control circuit for SRAM used in convolutional neural network (CNN) processors. The control circuit has a precision of 1 ps and can be easily adjusted by changing the number of buffers in the delay cell and the tristate buffer sizes. A 1 KB CNN processor SRAM is designed and simulated to further verify our design concepts. Layout area overhead are also analyzed for the proposed control circuit.