Hardware system design of SD card reader and image processor on FPGA

Yansi Yang, Yingyun Yang, Lipi Niu, Huabing Wang, Bo Liu
{"title":"Hardware system design of SD card reader and image processor on FPGA","authors":"Yansi Yang, Yingyun Yang, Lipi Niu, Huabing Wang, Bo Liu","doi":"10.1109/ICINFA.2011.5949060","DOIUrl":null,"url":null,"abstract":"We designed a useful digital signal generating system which transforms various file data stored in SD card into SDI output signal based on the FPGA hardware platform. This paper presents the hardware design and implementation of the system, which includes two steps. First step is the design of the NIOS II system, which includes SRAM controller and SD card controller IP core design. Second step is the generation of the whole functional SOPC system which using Quartus II development tool. NIOS II system is integrated with the scrambling encoders in this step. And then the hardware system is implemented.","PeriodicalId":299418,"journal":{"name":"2011 IEEE International Conference on Information and Automation","volume":"411 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Information and Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICINFA.2011.5949060","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

We designed a useful digital signal generating system which transforms various file data stored in SD card into SDI output signal based on the FPGA hardware platform. This paper presents the hardware design and implementation of the system, which includes two steps. First step is the design of the NIOS II system, which includes SRAM controller and SD card controller IP core design. Second step is the generation of the whole functional SOPC system which using Quartus II development tool. NIOS II system is integrated with the scrambling encoders in this step. And then the hardware system is implemented.
基于FPGA的SD卡读卡器和图像处理器硬件系统设计
基于FPGA硬件平台,设计了一个实用的数字信号生成系统,将存储在SD卡中的各种文件数据转换为SDI输出信号。本文介绍了该系统的硬件设计与实现,主要分为两个步骤。第一步是NIOS II系统的设计,其中包括SRAM控制器和SD卡控制器的IP核设计。第二步是使用Quartus II开发工具生成整个功能SOPC系统。在此步骤中,NIOS II系统与置乱编码器集成在一起。然后对硬件系统进行了实现。
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