{"title":"A New Device Architecture with Embedded Gate Oxide Gate Work Function for Double Gate MOSFETs","authors":"Md. Ahsan-Uz-Zaman, Safayet Ahmed, M. Tanseer Ali","doi":"10.1109/ICREST.2019.8644078","DOIUrl":null,"url":null,"abstract":"Metal gate techniques with dissimilar gate work function have been persevered for alleviation of short channel effects (SCEs) and high performance. In this application, embedded oxide-double gate (EO-DG) MOSFETs with dissimilar gates work functions have been proposed. The simulation consequences reveal that the proposed composition device B (gold) with high work function alleviates SCEs like off current (as 3.61×10−17 A/µm), subthreshold slope (as 64.74 mV/dec), drain-induced barrier lowering (as 42.14 mV/V), and elevates ON-OFF ratio (ION/IOFF=1.74×1013). Thus, EO-DG MOSFETs are most appropriate candidate for next generation transistors. Index Terms— Double Gate MOSFETs, Drain-inducer barrier lowering (DIBL), Work Function, Short channel effects (SCEs).","PeriodicalId":108842,"journal":{"name":"2019 International Conference on Robotics,Electrical and Signal Processing Techniques (ICREST)","volume":"297 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Robotics,Electrical and Signal Processing Techniques (ICREST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICREST.2019.8644078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Metal gate techniques with dissimilar gate work function have been persevered for alleviation of short channel effects (SCEs) and high performance. In this application, embedded oxide-double gate (EO-DG) MOSFETs with dissimilar gates work functions have been proposed. The simulation consequences reveal that the proposed composition device B (gold) with high work function alleviates SCEs like off current (as 3.61×10−17 A/µm), subthreshold slope (as 64.74 mV/dec), drain-induced barrier lowering (as 42.14 mV/V), and elevates ON-OFF ratio (ION/IOFF=1.74×1013). Thus, EO-DG MOSFETs are most appropriate candidate for next generation transistors. Index Terms— Double Gate MOSFETs, Drain-inducer barrier lowering (DIBL), Work Function, Short channel effects (SCEs).