Implementation of a BIC monitor in a new analog BIST structure

Abstract

The last step in the development of a BIST structure employing a new self-test technique for analog circuits is presented in this paper, namely the design and implementation of a suitable built-in supply current (BIC) monitor. The new self-test technique based on power supply current monitoring, takes advantage of the redundancy in the structure of fully balanced circuits. The new technique requires a special BIC monitor that provides appropriate signals for a successful fault detection. The BIC monitor, presented in this paper, is based on a second generation current conveyor CCII+, and offers an accurate measurement of supply currents with a minimal supply voltage degradation. The BIC monitor circuit was evaluated using fault simulations, which show a reasonable fault coverage. An implementation of the new BIC monitor in an analog BIST structure is finally described.