Rapid prototyping of modular/hypercube trellis decoders for communication systems

Abstract

In this work, we look at a novel approach for the realization of a fully parallel decoder based on the Viterbi algorithm and hypercube architecture using a rapid prototyping method on FPGAs. Our proposed modular/hypercube architecture allows optimization of the surface by connecting modules together in such a way that a minimum of interconnections between modules is needed. Further optimization is possible using temporal multiplexing.