Measurement and simulation correlation of backplane serdes channel

P. Qu
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引用次数: 2

Abstract

Serial data link has been widely used in telecom industry. The ability to accurately predict serdes channel insertion loss and return loss plays a critical role in prediction of serdes link performance. In a recent project we designed some test cards with the objective to characterize backplane serdes channel and conduct measurement to simulation correlation. The first part of the study is to try to correlate differential insertion loss (phase and amplitude) of 2D transmission lines between measurement and simulation. A wide band W element model extracted with Simbeor is verified and used in subsequent simulation. In the second part of the study, a full backplane serdes channel consists of daughter cards, backplane, connectors, vias, SMA launches is simulated and compared with TDR measurement. Each element is represented by a S parameter black box and cascaded together with verified W element model for PCB trace. Care must be taken when dealing with cascaded S parameter boxes in time domain simulation. Reasonable agreement is achieved on TDR/TDT signature, differential insertion loss and return loss. The final verification is an eye diagram simulation using real serdes device silicon model and compare eye diagram simulation based on measured s4p and that from S parameter model. In this paper, we presented the methodology and flow that was adopted in this study.
背板伺服通道的测量与仿真相关
串行数据链路在电信行业中得到了广泛的应用。准确预测服务器信道插入损耗和返回损耗的能力在预测服务器链路性能中起着至关重要的作用。在最近的一个项目中,我们设计了一些测试卡,目的是表征背板服务器通道并进行测量以模拟相关性。研究的第一部分是尝试在测量和模拟之间关联二维传输线的差分插入损耗(相位和幅度)。验证了Simbeor提取的宽带W元模型,并将其用于后续的仿真。在研究的第二部分中,模拟了由子卡、背板、连接器、过孔、SMA发射组成的全背板serdes通道,并与TDR测量进行了比较。每个元件由一个S参数黑盒表示,并与经过验证的W元件模型级联在一起,用于PCB走线。在时域仿真中处理级联的S参数框时必须注意。在TDR/TDT信号、差分插入损耗和回波损耗方面达成了合理的一致。最后的验证是使用真实的serdes器件硅模型进行眼图仿真,并将基于s4p测量的眼图仿真与S参数模型的眼图仿真进行比较。在本文中,我们介绍了在本研究中采用的方法和流程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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