Using Two-Dimensional DC Characterization to Improve Distortion Level of Analog Multipliers

Abstract

This work illustrates how to take advantage of the distortion analysis of analog multipliers through DC characterization to establish design and implementation guidelines for the circuit. For this purpose, a CMOS voltage-mode analog multiplier is theoretically analyzed in order to relate the distortion coefficients of its DC transfer surface to the technology parameters and to the geometry of the transistors. The most relevant distortion coefficients are thus discriminated from a set of coefficients obtained from measurement, thus allowing the identification of the most critical circuit parameters that contribute for the distortion level of the analog multiplier.