A 30 V line driver in submicron BiCMOS technology

Abstract

This paper presents a 30 V line driver for telecommunication applications. The circuit (0.3 mm/sup 2/ in area) is implemented in a 5 V 0.8 /spl mu/m BiCMOS process using 30 V extended-drain MOS devices fully compatible with low voltage technology. The design uses a Quasi-Current Mirror output stage and is capable of delivering up to 30 mA to the load with an idle current of less than 1 mA. The line driver exhibits a bandwidth of 2 MHz with a phase margin of 45.