VLSI fuzzy chip and inference accelerator board systems

[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic Pub Date : 1991-05-26 DOI:10.1109/ISMVL.1991.130716

Hiroyuki Watanabe, J. Symon, W. Dettloff, K. E. Yount

引用次数: 49

Abstract

The architecture and operational features of a VLSI fuzzy logic inference processor are described. Also described are the architecture and associated high-level software of two VMEbus-board systems based on the fuzzy chip. The VLSI implementation of a fuzzy logic inference mechanism allows the use of rule-based control and decision making in demanding real-time applications. The CMOS chip consists of 688000 transistors, of which 476000 are used for RAM memory. In addition to operating in a robot, the single chip board is installed on a Sun-3 workstation for further research and software development.<>

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VLSI模糊芯片与推理加速板系统

介绍了一种超大规模集成电路模糊逻辑推理处理器的结构和工作特点。介绍了基于模糊芯片的两种vmebus板系统的体系结构和相关的高级软件。模糊逻辑推理机制的VLSI实现允许在要求苛刻的实时应用中使用基于规则的控制和决策。CMOS芯片由688000个晶体管组成，其中476000个晶体管用于RAM存储器。除了在机器人中操作外，该单芯片板还安装在Sun-3工作站上，用于进一步研究和软件开发。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic

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