Kangjun Bai, Daniel Titcombe, Jack Lombardi, C. Thiem, N. Cady
{"title":"Moving Towards Game-Changing Technology: Fabrication and Application of HfO2 RRAM for In-Memory Computing","authors":"Kangjun Bai, Daniel Titcombe, Jack Lombardi, C. Thiem, N. Cady","doi":"10.1109/ISQED57927.2023.10129352","DOIUrl":null,"url":null,"abstract":"In-memory computing is an emerging computing paradigm that sidesteps challenges inherent to deep learning acceleration in conventional systems. Along with the development of neuromorphic architectures, resistive random-access memory (RRAM) has paved the way for in-memory computing by processing mixed-signal operations in a fully parallel fashion. In this work, we designed and implemented working prototypes of in-memory operators using a custom 65nm CMOS/RRAM technology node fabricated on a 300mm wafer. Specifically, arrays of hafnium-oxide RRAM cells were built in a crossbar structure to support high-throughput matrix multiplications at low energy and area consumption. Building upon these efficient RRAM, applications of pixel detection and flow-based Boolean operations are presented. Our introduced approaches alleviate the intermediate data movement and parallelize the computations, thereby yielding orders of magnitude improvement in energy and area efficiency over the equivalent CMOS design.","PeriodicalId":315053,"journal":{"name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 24th International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED57927.2023.10129352","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In-memory computing is an emerging computing paradigm that sidesteps challenges inherent to deep learning acceleration in conventional systems. Along with the development of neuromorphic architectures, resistive random-access memory (RRAM) has paved the way for in-memory computing by processing mixed-signal operations in a fully parallel fashion. In this work, we designed and implemented working prototypes of in-memory operators using a custom 65nm CMOS/RRAM technology node fabricated on a 300mm wafer. Specifically, arrays of hafnium-oxide RRAM cells were built in a crossbar structure to support high-throughput matrix multiplications at low energy and area consumption. Building upon these efficient RRAM, applications of pixel detection and flow-based Boolean operations are presented. Our introduced approaches alleviate the intermediate data movement and parallelize the computations, thereby yielding orders of magnitude improvement in energy and area efficiency over the equivalent CMOS design.