A Wideband High-linearity Input Buffer Based on Cascade Complementary Source Follower

Abstract

The input buffer is widely used in the analog-to-digital converter (ADC) to isolate input signal from the internal sample-and-hold network and package. In this work, we propose a wide-band and high-linearity input buffer which is based on cascade complementary source follower (CCSF) structure. It is consisted of two-stage PMOS source follower (SF) and NMOS SF with improved linearity. Designed in 65-nm CMOS under 2.5-V supply, the post-layout simulation result shows that the differential input buffer achieves a Nyquist SFDR of 78.3 dB at 4 GS/s sampling rate and consumes 21.14 mW.