S.A. El-khalik, S. Kayed, M. El-Azab, M. Dessouky, H. Ragai
{"title":"Automated synthesis of integrated RF CMOS LC VCOs","authors":"S.A. El-khalik, S. Kayed, M. El-Azab, M. Dessouky, H. Ragai","doi":"10.1109/ICEEC.2004.1374506","DOIUrl":null,"url":null,"abstract":"This paper presents an example of analog RF circuit synthesis, namely an LC-VCO for Bluetooth. Transistor sizing is carried out using a simulation-based genetic Optimization tool called AMIGO;. The synthesized example leads to a 2.4-GHz fully integrated LC voltage-controlled oscillator (VCO) using 0.35-μm CMOS technology. The simulated phase-noise values are found to be –112, -107, and -106 dBc/Hz at 600 kHz offset from 2.1, 2.4, and 2.7 GHz carriers, respectively. The VCO consumes 4.77 mA from a 3.3-V supply voltage. An accumulation-mode MOS varactor is used to achieve 25% of tuning range, The MOS varactor and the on-chip spiral models are taken from a standard cell library provided by the foundry.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"133 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEC.2004.1374506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents an example of analog RF circuit synthesis, namely an LC-VCO for Bluetooth. Transistor sizing is carried out using a simulation-based genetic Optimization tool called AMIGO;. The synthesized example leads to a 2.4-GHz fully integrated LC voltage-controlled oscillator (VCO) using 0.35-μm CMOS technology. The simulated phase-noise values are found to be –112, -107, and -106 dBc/Hz at 600 kHz offset from 2.1, 2.4, and 2.7 GHz carriers, respectively. The VCO consumes 4.77 mA from a 3.3-V supply voltage. An accumulation-mode MOS varactor is used to achieve 25% of tuning range, The MOS varactor and the on-chip spiral models are taken from a standard cell library provided by the foundry.