Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits

Satyendra R. Datla, M. Thornton
{"title":"Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits","authors":"Satyendra R. Datla, M. Thornton","doi":"10.1109/ISMVL.2010.32","DOIUrl":null,"url":null,"abstract":"Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is based on Field Effect Transistors (FETs) that have different voltage threshold levels. The resulting logic cell library is sufficient to implement all possible quaternary switching functions. The logic circuits operate in voltage mode where different ranges of voltages encode the logic levels. Voltage mode circuitry is used to minimize overall power dissipation characteristics. Analysis of the resulting multiplication circuits indicates that power dissipation characteristics are advantageous when compared to equivalent word-sized binary voltage mode configurations with no decrease in performance.","PeriodicalId":447743,"journal":{"name":"2010 40th IEEE International Symposium on Multiple-Valued Logic","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 40th IEEE International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2010.32","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

Abstract

Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is based on Field Effect Transistors (FETs) that have different voltage threshold levels. The resulting logic cell library is sufficient to implement all possible quaternary switching functions. The logic circuits operate in voltage mode where different ranges of voltages encode the logic levels. Voltage mode circuitry is used to minimize overall power dissipation characteristics. Analysis of the resulting multiplication circuits indicates that power dissipation characteristics are advantageous when compared to equivalent word-sized binary voltage mode configurations with no decrease in performance.
第四元电压模式逻辑单元与定点倍增电路
使用一组基于基数4的逻辑单元来设计和评估定点乘法体系。逻辑电路库基于具有不同电压阈值水平的场效应晶体管(fet)。所得到的逻辑单元库足以实现所有可能的四元转换功能。逻辑电路在电压模式下工作,其中不同范围的电压编码逻辑电平。电压模式电路用于最小化整体功耗特性。对乘法电路的分析表明,与等效字大小的二进制电压模式配置相比,功耗特性是有利的,而性能没有下降。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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