Performance analysis of a fault-tolerant crossbar molecular switch memory demultiplexer

A. Coker, V. Taylor
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Abstract

Nanoscale elements are fabricated using bottom-up processes, and as such they are prone to high levels of defects. Defect-tolerance will play a crucial role in the realization of practical nanoscale devices. In this paper we investigate the performance impact of combining a molecular switch junction with an ECC demultiplexer to allow for enhanced fault-tolerance. The results indicate that the molecular switch junction, which adds redundancy to the address lines, aids in reducing the delay as the redundancy increases. Further, the probability analysis also indicates that the fault tolerance improves with the combined scheme.
容错交叉棒分子开关存储器解复用器的性能分析
纳米级元件是使用自下而上的工艺制造的,因此它们容易产生高水平的缺陷。缺陷容限将在实际纳米器件的实现中发挥至关重要的作用。在本文中,我们研究了将分子开关结与ECC解复用器结合以允许增强容错性的性能影响。结果表明,分子开关结增加了地址线的冗余,有助于减少冗余增加时的延迟。此外,概率分析还表明,组合方案的容错性有所提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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