A 30GHz integrated time-division multiplexing front-end for phased-array applications in SiGe

Abstract

This paper presents a fully integrated receiver front-end for time-division multiplexing phased-array system. The 30GHz front-end includes a low-noise amplifier (LNA), a 4:1 multiplexer, a mixer, and a clock sequencer. The circuit has been implemented in a 0.25μm, 130GHz-fT SiGe process. The front-end shows a input reflection coefficient (S11) of −20dB, a minimum measured LNA-Multiplexer noise figure (NF) of 4.1dB, and a maximum conversion gain (CG) of 18.9dB at 30GHz. Measurements show a 1dB input compression point of −32.3dBm, a third order intercept point (IIP3) of −22dBm, and a channel isolation of 23dB at 30GHz. This system reduces receiver power consumption by reducing ADC numbers.