High-Performance PMOS Devices on (110)/<111'> Substrate/Channel with Multiple Stressors

H. Wang, Shih-Hian Huang, Ching-Wei Tsai, Hsien-Hsin Lin, Tze-Liang Lee, Shih-Chang Chen, C. H. Diaz, M. Liang, J. Sun
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引用次数: 9

Abstract

A study was performed to investigate the effect of multiple stressors on CMOS devices on (110) and (100) substrates with different channel directions. For the first time, 87% ION-IOFF improvement is achieved by utilizing SiGe-S/D and compressive contact etch stop layer (c-CESL) for PMOS devices on (110) substrate with lang111'rang channel direction. The improvement is similar to that on conventional (100) substrate with lang110>rangchannel direction and can be explained by piezoresistive coefficients. Record PMOS device performance of Ion = 900 muA/mum at Ioff = 100 nA/mum and VDD = 1.0V for 40nm gate length is demonstrated
具有多个应力源的(110)/衬底/通道的高性能PMOS器件
在不同通道方向的(110)和(100)衬底上研究了多个应力源对CMOS器件的影响。通过使用SiGe-S/D和压缩接触蚀刻停止层(c-CESL),在(110)衬底上的PMOS器件具有lang111'rang通道方向,首次实现了87%的ION-IOFF改进。这种改善与lang110>rangchannel方向的传统(100)衬底相似,可以用压阻系数来解释。演示了在Ioff = 100 nA/mum、VDD = 1.0V、栅极长度为40nm时,离子= 900 muA/mum的PMOS器件性能记录
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