Extended scaling of ultrathin gate oxynitride toward sub-65nm CMOS by optimization of UV photo-oxidation, soft plasma/thermal nitridation & stress enhancement

Abstract

A novel UV photo-oxidation (UVPO) is developed for ideal "atomic-layer oxidation" with excellent thickness control down to 4/spl Aring/, which is very promising for interfacial layer formation of scaled gate oxynitride and high-k applications. In addition, ultrathin oxynitride (EOT<12/spl Aring/) using a newly-developed low ion-energy nitrogen plasma (30% plasma damage reduction) in combination with thermal nitridation is demonstrated for n/pMOSFET performance optimization. Finally, device performance is further enhanced (+7% of nFET Ion-Ioff by tensile stress with negligible impact on pFET) by mechanical stress modulation from strain contact-etch-stop layer (CESL). The proposed technologies represent an efficient approach to realize ultrathin gate oxynitride toward sub-65nm CMOS production.