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A Low DDR Bandwidth 100FPS 1080p Video 2D Discrete Wavelet Transform Implementation on FPGA (Abstract Only)

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays Pub Date : 2016-02-21 DOI:10.1145/2847263.2847321
M. Ibraheem, S. Z. Ahmed, K. Hachicha, S. Hochberg, P. Garda
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低DDR带宽100FPS 1080p视频二维离散小波变换的FPGA实现(仅摘要)
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Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
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