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Two-Stage Pipelining Implementation of the Secure Hash Algorithm SHA-3 on Virtex-5 and Virtex-6 FPGAs

Advances in Information, Communication and Cybersecurity Pub Date : 1900-01-01 DOI:10.1007/978-3-030-91738-8_51
F. Assad, M. Fettach, F. Elotmani, A. Tragha
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安全哈希算法SHA-3在Virtex-5和Virtex-6 fpga上的两阶段流水线实现
本文章由计算机程序翻译，如有差异，请以英文原文为准。
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来源期刊
Advances in Information, Communication and Cybersecurity
Advances in Information, Communication and Cybersecurity
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