Electrical high speed chip-package characterization comparison of simulation results with component measurement

E. Miersch, M. Gospodinova, G. Nan, J. Thomas, J. Held
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Abstract

The electrical characteristics of interconnects (signal and power nets) of a given multi-chip package (MCP) had to be determined. MCP-nets are mostly multi drop (multi point) nets (MDNs) with in this case up to 18 terminals. The given clock frequency range is 200MHz to 500MHz. The outer dimensions of the MCP under test (MCP u.t.) are about 11 /spl times/ 12mm. The goal of the analysis was to find out an appropriate way of modelling for such a complex package including signal as well as power nets. It was also necessary to understand if the MCP multi-port nets can be described as lumped circuits in the given performance range of 200MHz to 500MHz as predicted by the /spl lambda//20 - and the t/sub s/ > 5t/sub f/ - rules for the about 1cm long partial branches of the MDNs.
电子高速芯片封装特性仿真结果与元件测量结果的比较
必须确定给定多芯片封装(MCP)的互连(信号和电网)的电气特性。mcp -网大多是多滴(多点)网(mdn),在这种情况下最多有18个终端。给定时钟频率范围为200MHz至500MHz。被测MCP (MCP u.t)的外尺寸约为11 /spl倍/ 12mm。分析的目的是找到一种合适的方法来模拟这样一个复杂的包,包括信号和电网。还需要了解MCP多端口网络是否可以描述为在给定的200MHz至500MHz性能范围内的集总电路,如/spl lambda//20 -和t/sub /s / > 5t/sub / f/ -规则所预测的mdn约1cm长的部分分支。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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