A novel configurable boundary-scan circuit design of SRAM-based FPGA

Abstract

This paper presents a novel configurable boundary-scan circuit (CBSC) of SRAM-based field programmable gate array (FPGA). The embedded SRAM cells of FPGA have been used to modify the original structure of boundary-scan circuit (BSC). Users only need to change the data stored in the embedded SRAM cell during the configuration of the FPGA chip. In this way, the boundary-scan chain can be configured to any desired length. Compared with the original structure of BSC, this circuit using 0.25µm CMOS process can be part of a standard digital cell library and has been used in the BQV series FPGAs of BMTI.