Rate Matching and Interleaved Hardware Sharing Design

Abstract

Based on 3GPP standards, this paper investigates the interleaving and rate matching parts of turbo, convolutional, polar and LDPC codes used in 4G and 5G communication links. For the four different algorithms, this paper optimizes the address mapping formulas and proposes the interleaving storage sharing and module sharing methods, and the structure design of the shared modules. The feasibility of the algorithms is demonstrated through interleaving of codes and simulation verification, and a certain degree of hardware multiplexing of the 4G and 5G communication links is achieved.