Data Storage and Simulation Based on FPGA and DDR SDRAM for Super-Resolution Localization Microscopy

Abstract

We present a data storage and simulation method for superresolution localization microscopy. With the development of detector technology, from electron multiplying charge-coupled device (EMMCCD) to scientific complementary metal-oxide semiconductor (sCMOS) cameras, the data acquisition rate has been increased several times. While this is significant progress for data acquisition, it brings great data processing challenges for computers, such as data storage, data transmission, and computer algorithm rate. In this paper, we present a data processing method based on a Field Programmable Gate Array (FPGA) chip and a double data rate Synchronous Dynamic Random Access Memory (DDR SDRAM) component, use procedure to control IP hardcore in FPGA chip, to realize writing and reading on DDR from FPGA chip. To relieve data calculation rate lag behind the collection rate, we validly cached part of the row data from camera, and we verified the result throw the third-party simulation software with a time sequence analysis diagram.