Low power current mode ramp ADC for multi-frequency cell impedance measurement

Abstract

We show the design of a current mode ramp analog to digital converter (ADC) in standard 0.13 μm, 1 poly, 8 metal CMOS process. The ADC is a low-power and area-saving solution for multi-frequency cell impedance measurement. It uses two-step conversion to boost the conversion time by a factor of 32, while keeping a constant practical clock frequency. The ramp ADC samples current signals at different frequencies and converts them into digital signals simultaneously. The main blocks of the ADC are current-mode ramp generator, current comparator, a delay locked loop (DLL) and a gray-code counter.