A Temperature-Compensated Power-on-Reset Circuit in 40nm CMOS

Abstract

To improve the accuracy and eliminate the bandgap reference circuit of conventional POR (power-on-reset) circuits, a low-cost, low-power, temperature-compensated POR circuit with precise trigger voltage is presented in this paper. The proposed POR circuit was designed and implemented in a 40nm CMOS technology. It achieves a 740nA quiescent current under 1.1V power supply, a 0.008mm2 active area, and a 350ppm/°C trigger voltage temperature coefficient from -40°C to 120°C.