Harmonics and common mode voltage reduction in multilevel SPWM technique

Abstract

Conventional 2-level PWM inverters generate high dv/dt and high frequency common mode voltages which is very harmful in electric drives applications. It may damage motor bearings, conducted electromagnetic interferences, and malfunctioning of electronic equipments. This paper presents the simple methods to control the harmonics as well as common mode voltages in multilevel inverters using different structures of sine-triangle comparison method such as phase disposition (PD), phase opposition disposition (POD), and common mode voltage off-set voltage addition method. Simulation results obtained in Matlab/Power System Blockset toolbox confirms the effectiveness of these simple methods to control common mode voltages. Experimental results presented have been obtained using dSpace 1104.