{"title":"A current-mode membership function generator with continuous slop tunability and low power consumption","authors":"Naser Beyraghi, A. Khoei, K. Hadidi","doi":"10.1109/IRANIANCEE.2013.6599652","DOIUrl":null,"url":null,"abstract":"In this paper to multiply or divide the current signals continuously with low power consumption, a simple but effective approach is proposed that is useful in current-mode analog circuits such as membership function generators in fuzzy logic controllers (FLC) and we study the effect of this approach on a typical fuzzifier. Simulation results show that by means of this approach the slope of membership functions can be tunable in an analog range while the power consumption is approximately in its minimum value 426μW. Also the circuit of a novel analog divider is presented which its power consumption is less than conventional dividers. The circuits are designed in 0.35μm CMOS process and the simulations are performed in HSPISE simulator.","PeriodicalId":383315,"journal":{"name":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRANIANCEE.2013.6599652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper to multiply or divide the current signals continuously with low power consumption, a simple but effective approach is proposed that is useful in current-mode analog circuits such as membership function generators in fuzzy logic controllers (FLC) and we study the effect of this approach on a typical fuzzifier. Simulation results show that by means of this approach the slope of membership functions can be tunable in an analog range while the power consumption is approximately in its minimum value 426μW. Also the circuit of a novel analog divider is presented which its power consumption is less than conventional dividers. The circuits are designed in 0.35μm CMOS process and the simulations are performed in HSPISE simulator.