Bootloader design considerations for resource-constrained microcontrollers in RFID reader designs

Abstract

De facto RFID reader design architectures typically involve the fusion of a proprietary SoC (solution on chip) with a low cost microcontroller. The SoC market offerings generally provide an RFID front end that is capable of generating the RFID modulated carrier signals as well as a receiver that is capable of decoding the received load modulated carrier and framing it within the structures defined within the ISO standards (ISO 15693, ISO14443, etc.) Given resource limitations on support microcontrollers, bootloader designs need to possess a very small memory footprint and at the same time need to ensure that application firmware is secure. This paper analyzes the suitability of open encryption algorithms and proposes alternatives that may be designed with very small memory footprints.