High-performance microprocessor packaging in the year 2000: technical and economic barriers and alternatives

B. Siu
{"title":"High-performance microprocessor packaging in the year 2000: technical and economic barriers and alternatives","authors":"B. Siu","doi":"10.1109/TENCON.1995.496381","DOIUrl":null,"url":null,"abstract":"By the year 2000, computers capable of >1000 MIPs and operating at >500 MHz are on the horizon. As the microprocessor becomes more powerful, major technical and economic challenges in packaging technologies are evident. In this paper, we trace the emergence of the microprocessor by examining the technical and economical drivers. It is seen that specialized material processes and designs are required to package a high-performance microprocessor. Low-cost materials with low dielectric constant and high electrical and thermal conductivity metallization are required to meet these objectives. As microprocessor architectures migrate towards closely-coupled CPU/cache requiring more than one VLSI, the multichip module is emerging/re-emerging as a requirement.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.1995.496381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

By the year 2000, computers capable of >1000 MIPs and operating at >500 MHz are on the horizon. As the microprocessor becomes more powerful, major technical and economic challenges in packaging technologies are evident. In this paper, we trace the emergence of the microprocessor by examining the technical and economical drivers. It is seen that specialized material processes and designs are required to package a high-performance microprocessor. Low-cost materials with low dielectric constant and high electrical and thermal conductivity metallization are required to meet these objectives. As microprocessor architectures migrate towards closely-coupled CPU/cache requiring more than one VLSI, the multichip module is emerging/re-emerging as a requirement.
高性能微处理器封装在2000年:技术和经济壁垒和替代品
到2000年,能够>1000 MIPs和>500 MHz操作的计算机即将出现。随着微处理器变得越来越强大,封装技术的主要技术和经济挑战是显而易见的。在本文中,我们通过检查技术和经济驱动因素来追溯微处理器的出现。可见,封装高性能微处理器需要专门的材料工艺和设计。为了达到这些目标,需要低介电常数和高导电性和导热性金属化的低成本材料。随着微处理器架构向需要多个VLSI的紧密耦合CPU/缓存迁移,多芯片模块正在作为一种需求出现/重新出现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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