A 443-µA 37.8-nV/√Hz CMOS multi-stage bandgap voltage reference

W. Yan, T. Christen
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Abstract

A CMOS bandgap voltage reference is presented, which achieves a low integrated noise of 150nVrms within a 0.1-10Hz bandwidth and a 37.8nV/√Hz wideband noise floor above 100Hz. The low noise performance is accomplished by employing a multi-stage bandgap topology, which results in an inherent noise advantage compared to a conventional CMOS bandgap. Fabricated in a 0.35μm HV CMOS technology, the bandgap voltage reference consumes 443μA from a nominal 3.4-V supply and occupies 0.5mm2 chip area.
一个443µA 37.8 nv /√Hz CMOS多级带隙电压基准
提出了一种CMOS带隙基准电压,在0.1 ~ 10hz带宽范围内实现了150nVrms的低集成噪声,在100Hz以上实现了37.8nV/√Hz的宽带本底噪声。低噪声性能是通过采用多级带隙拓扑来实现的,这与传统的CMOS带隙相比具有固有的噪声优势。该带隙基准电压采用0.35μ v CMOS工艺,标称3.4 v电源功耗为443μA,芯片面积为0.5mm2。
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