Matrix Multiply-Add in Min-plus Algebra on a Short-Vector SIMD Processor of Cell/B.E.

Kazuya Matsumoto, S. Sedukhin
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引用次数: 3

Abstract

It is well-known that the all-pairs shortest paths problem has a similar algorithmic characteristic to the classical matrix-matrix multiply-add (MMA) problem, one of the differences between the two problems is in the underlying algebra: the matrix multiply-add uses linear (+, x)-algebra whereas the all-pairs shortest paths problem uses (min, +)-algebra. This paper presents an implementation of 64×64 matrix multiply-add kernel in (min, +)-algebra on a short-vector SIMD processor, the so-called Synergistic Processing Element (SPE), of the Cell Broadband Engine (Cell/B.E.). Our implementation for the shortest paths problem adopts an existing fast algorithm of matrix multiply-add with a reduction of the number of required registers. The MMA implementation in (min, +)-algebra achieves the speed of 8.502 Gflop/s, which is about three times as low as that of the (+, x)-algebra MMA and is very close to the theoretical estimation based on the required number of instructions.
Cell/B.E.短矢量SIMD处理器上最小加代数的矩阵乘加
众所周知,全对最短路径问题与经典的矩阵-矩阵乘加(MMA)问题具有相似的算法特征,两者的区别之一在于底层代数:矩阵乘加问题使用线性(+,x)代数,而全对最短路径问题使用(min, +)代数。本文提出了在Cell宽带引擎(Cell/B.E.)的短向量SIMD处理器上实现(min, +)代数中的64×64矩阵乘加核,即所谓的协同处理单元(SPE)。我们对最短路径问题的实现采用了一种现有的快速矩阵乘加算法,减少了所需寄存器的数量。(min, +)-代数的MMA实现速度为8.502 Gflop/s,比(+,x)-代数的MMA低约三倍,非常接近基于所需指令数的理论估计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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