A 10Gb/s Equalizer with Decision Feedback for High Speed Serial Links

Abstract

A 10 Gb/s equalizer using both feedforward and decision-feedback equalization is designed for high speed serial-links. The chip is implemented in a standard 0.25 mum SiGe BiCMOS technology with 50 GHz peak ft, and packaged in a commercial LLP package. Using a 4-stage feedforward and 2-tap post-cursor cancellation, this equalizer achieves a total peak-to-peak jitter of 27 ps and 33 ps for 10" and 20" of copper traces on FR4, respectively. The transmitter uses NRZ signaling with no pre-emphasis.