Hardware design of an RS (7, 5) data coding circuit used by digital communication systems

F. Diaconu, L. Scripcariu, P. Matasaru
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Abstract

We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce the running-time and the CPU resource consumption. We design a battery powered encoder and investigate the minimum bit period value allowed at its inputs, and the minimum voltage from power supply required for operation.
数字通信系统RS(7,5)数据编码电路的硬件设计
设计了一种用于数字通信系统的多级数据编码器。在便携式设备上提供的许多服务都有时间限制。当处理时间和功耗至关重要时,硬件解决方案比软件算法更受欢迎。为了减少运行时间和CPU资源消耗,可以将处理多比特符号的强大纠错编码器作为硬件解决方案来实现。我们设计了一个电池供电的编码器,并研究了其输入允许的最小位周期值,以及运行所需的电源的最小电压。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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