Function Extraction from Arithmetic Bit-Level Circuits

M. Ciesielski, W. Brown, Duo Liu, A. Rossi
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引用次数: 11

Abstract

The paper describes a method to derive a polynomial function computed by an arithmetic bit-level circuit. The circuit is modeled as a bit-level network composed of adders and logic gates and computation performed by the circuit is viewed as a flow of binary data through the network. The problem is cast as a Network Flow problem and solved using standard algebraic techniques. Extraction of the arithmetic function from the circuit is accomplished by transforming the expression at the primary outputs into an expression at the primary inputs. Experimental results show application of the method to certain classes of large arithmetic circuits.
算术位级电路的函数提取
本文介绍了一种用算术位级电路计算多项式函数的推导方法。电路被建模为由加法器和逻辑门组成的位级网络,电路执行的计算被视为通过网络的二进制数据流。该问题被视为网络流问题,并使用标准代数技术解决。从电路中提取算术函数是通过将主要输出端的表达式转换为主要输入端的表达式来完成的。实验结果表明,该方法适用于某些类型的大型算术电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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