2-D state space filter with fewer multipliers

Abstract

Summary form only given. It is shown that compared to existing realizations, a considerable reduction in the number of multipliers for hardware realizations of 2-D state-space digital filters can be achieved. This is accomplished by transformation of the given system to a block diagonal canonical structure. A computational algorithm has been developed to reduce the system to the structured form shown, and a WAVEFRONT array architecture has been proposed to implement it in hardware.<>