On-chip antenna design for UWB applications

Abstract

On-chip antenna design in standard complementary metal-oxide-semiconductor (CMOS) process is very difficult due to high inherent loss in silicon substrate. Often, the top-most layer is utilized for antenna placement and remaining layers are reserved for other electronic circuits. Although it is not possible to overcome the effects of substrate loss which results in low antenna efficiency, it is possible to make use of remaining layers to reduce the antenna loading from low-resistivity silicon. In this study, we designed and prototyped an impulse generator circuit, transmitter circuit and a loop antenna on the same silicon substrate. The prototype is built through Europractice UMC L180 mixed/RF technology. Antenna and oscillator have been tested and characterized with measurements and simulations.