Generation of reduced analog circuit models using transient simulation traces

P. Winkler, Henda Aridhi, M. Zaki, S. Tahar
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引用次数: 1

Abstract

The generation of fast models for device level circuit descriptions is a very active area of research. Model order reduction is an attractive technique for dynamical models size reduction. In this paper, we propose an approach based on clustering, curve-fitting, linearization and Krylov space projection to build reduced models for nonlinear analog circuits. We demonstrate our model order reduction method for three nonlinear circuits: a voltage controlled oscillator, an operational amplifier and a digital frequency divider. Our experimental results show that the reduced models lead to an improvement in simulation speed while guaranteeing the representation of the behavior of the original circuit design.
利用瞬态仿真走线生成简化的模拟电路模型
器件级电路描述快速模型的生成是一个非常活跃的研究领域。模型阶数约简是一种有吸引力的动态模型尺寸缩减技术。本文提出了一种基于聚类、曲线拟合、线性化和克雷洛夫空间投影的方法来建立非线性模拟电路的简化模型。我们演示了三种非线性电路的模型降阶方法:压控振荡器、运算放大器和数字分频器。我们的实验结果表明,简化后的模型在保证原始电路设计行为的表现的同时,提高了仿真速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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